35 search results - page 6 / 7 » Yield modelling and Yield Enhancement for FPGAs using Fault ... |
IWSEC
2009
Springer
14 years 2 months ago
2009
Springer
Abstract. Common software-protection systems attempt to detect malicious observation and modification of protected applications. Upon tamper detection, anti-hacking code may produ...
ISVLSI
2007
IEEE
14 years 1 months ago
2007
IEEE
In sub-90nm technologies, more frequent hard faults pose a serious burden on processor design and yield control. In addition to manufacturing-time chip repair schemes, microarchit...
MTDT
2003
IEEE
14 years 26 days ago
2003
IEEE
Advances in System-on-Chip (SoC) technology rely on manufacturing and assembling high-performance system cores for many critical applications. Among these cores, memory occupies t...
SIGMETRICS
2008
ACM
13 years 7 months ago
2008
ACM
Two schemes proposed to cope with unrecoverable or latent media errors and enhance the reliability of RAID systems are examined. The first scheme is the established, widely used d...
PR
2006
13 years 7 months ago
2006
All of the prototype reduction schemes (PRS) which have been reported in the literature, process time-invariant data to yield a subset of prototypes that are useful in nearest-nei...