1000 search results - page 24 / 200 » Yield-Aware Cache Architectures |
CAL
2002
13 years 7 months ago
2002
Embedded systems commonly execute one program for their lifetime. Designing embedded system architectures with configurable components, such that those components can be tuned to t...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
We propose an architectural design methodology for designing formally verifiable cache coherence protocols, called Fractal Coherence. Properly designed to be fractal in behavior, t...
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
SKG
2006
IEEE
14 years 1 months ago
2006
IEEE
Web caching is an important technology for reducing Internet access latency, alleviating network traffic, and spreading server load. An important issue that affects the performa...
ISCA
1994
IEEE
13 years 12 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...