1000 search results - page 33 / 200 » Yield-Aware Cache Architectures |
DAC
2007
ACM
14 years 8 months ago
2007
ACM
The memory hierarchy of a system can consume up to 50% of microprocessor system power. Previous work has shown that tuning a configurable cache to a particular application can red...
DAC
2004
ACM
13 years 11 months ago
2004
ACM
A processor core, previously implemented in a 0.25m Al process, is redesigned for a 0.13m Cu process to create a dualcore processor with 1MB integrated L2 cache, offering an effic...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
Caches are organized at a line-size granularity to exploit spatial locality. However, when spatial locality is low, many words in the cache line are not used. Unused words occupy ...
ICDCS
2002
IEEE
14 years 21 days ago
2002
IEEE
Internet streaming applications are affected by adverse network conditions such as high packet loss rates and long delays. This paper aims at mitigating such effects by leveraging...
ISCA
2002
IEEE
14 years 20 days ago
2002
IEEE
On-chip caches represent a sizable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potential...