1000 search results - page 61 / 200 » Yield-Aware Cache Architectures |
GLVLSI
2008
IEEE
14 years 2 months ago
2008
IEEE
Phase-based tuning methodologies specialize system parameters for each application phase of execution. Parameters are varied during execution, as opposed to remaining fixed as in ...
IPPS
1999
IEEE
14 years 3 days ago
1999
IEEE
In this paper we propose the use of an optical network not only as the communication medium, but also as a system-wide cache for the shared data in a multiprocessor. More specifica...
IPPS
1994
IEEE
13 years 12 months ago
1994
IEEE
Present-day parallel computers often face the problems of large software Overheadsfor process switching and interprocessor communication. These problems are addressed by the Multi...
WCET
2010
13 years 5 months ago
2010
To take full advantage of the increasingly used shared-memory multicore architectures, software algorithms will need to be parallelized over multiple threads. This means that thre...
IEEEPACT
1998
IEEE
14 years 2 days ago
1998
IEEE
The fast evolution of processor performance necessitates a permanent evolution of all the multiprocessor components, even for small to medium-scale symmetric multiprocessors (SMP)...