As SRAM devices are scaled down, the number of variation-induced defective memory cells increases rapidly. Combination of ECC, particularly SECDED, with a redundancy technique can...
In this paper, we describe an algorithm and implementation of locality optimizations for architectures with instruction sets such as Intel’s SSE and Motorola’s AltiVec that su...
— Cache and Forward (CNF) Architecture is a novel architecture aimed at delivering content efficiently to potentially large number of intermittently connected mobile hosts. It us...
Current technology trends of increased scale of integration are pushing CMOS technology into the deepsubmicron domain, enabling the creation of chips with a significantly greater...
Current Internet users see the combination of World-wide Web (WWW) and electronic mail as a synonym for the Internet. While WWW is excellent for easy and fast dissemination of inf...