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ERSA
2009
146views Hardware» more  ERSA 2009»
13 years 8 months ago
Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor
We present the architecture and programming model for MORA, a coarse-grained reconfigurable processor aimed at multimedia applications. The MORA architecure is a MIMD machine consi...
Wim Vanderbauwhede, Martin Margala, Sai Rahul Chal...
FPL
2010
Springer
111views Hardware» more  FPL 2010»
13 years 8 months ago
Managing Short-Lived and Long-Lived Values in Coarse-Grained Reconfigurable Arrays
Abstract--Efficient storage in spatial processors is increasingly important as such devices get larger and support more concurrent operations. Unlike sequential processors that rel...
Brian Van Essen, Robin Panda, Aaron Wood, Carl Ebe...
FPL
2000
Springer
96views Hardware» more  FPL 2000»
14 years 2 months ago
Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures
Coarse-grain reconfigurable architectures have been a matter of intense research in the last few years. They promise to be more adequate for computational tasks due to their better...
Reiner W. Hartenstein, Michael Herz, Thomas Hoffma...