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ASPDAC
1998
ACM
14 years 24 days ago
1998
ACM
-- The logic construction of a double-edge-triggered (DET) flip-flop, which can receive input signal at two levels of the clock, is analyzed and a new circuit design of CMOS DET fl...
ASPDAC
1998
ACM
14 years 24 days ago
1998
ACM
Functional debugging often dominates the time and cost of the ASIC system development, mainly due to the limited controllability and observability of the storage elements in desig...
ASPDAC
1998
ACM
14 years 24 days ago
1998
ACM
— Test Pattern Generation for combinational circuits entails the identification of primary input assignments for detecting each fault in a set of target faults. An extension to ...
ASPDAC
1998
ACM
14 years 24 days ago
1998
ACM
— This article describes an algorithm for curvilinear detailed routing. We significantly improved the average time performance of Gao’s algorithm by resolving its bottleneck r...
ASPDAC
1998
ACM
14 years 24 days ago
1998
ACM
—An AND-OR-EXOR network, where the output EXOR gate has only two inputs, is one of the simplest three-level architecture. This network realizes an EXOR of two sum-of-products exp...