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ASPDAC
2004
ACM
145views Hardware» more  ASPDAC 2004»
14 years 3 months ago
Hierarchical random-walk algorithms for power grid analysis
Abstract— This paper presents a power grid analyzer that combines a divide-and-conquer strategy with a random-walk engine. A single-level hierarchical method is first described ...
Haifeng Qian, Sachin S. Sapatnekar
ASPDAC
2004
ACM
103views Hardware» more  ASPDAC 2004»
14 years 1 months ago
Design and implementation of a secret key steganographic micro-architecture employing FPGA
In the well-known "prisoners' problem", a representative example of steganography, two persons attempt to communicate covertly without alerting the warden. One appr...
Hala A. Farouk, Magdy Saeb
ASPDAC
2004
ACM
115views Hardware» more  ASPDAC 2004»
14 years 3 months ago
A high efficiency 0.5W BTL class-D audio amplifier with RWDM technique
A novel class-D amplifier comprises a Rectangular Wave Delta Modulator (RWDM), bridged tied load (BTL) output gate-driver and low-pass filter. The rectangular wave delta modulator ...
Simon C. Li, Vincent Chia-Chang Lin
ASPDAC
2004
ACM
107views Hardware» more  ASPDAC 2004»
14 years 3 months ago
Fast, predictable and low energy memory references through architecture-aware compilation
The design of future high-performance embedded systems is hampered by two problems: First, the required hardware needs more energy than is available from batteries. Second, curren...
Peter Marwedel, Lars Wehmeyer, Manish Verma, Stefa...
ASPDAC
2004
ACM
97views Hardware» more  ASPDAC 2004»
14 years 3 months ago
A cosynthesis algorithm for application specific processors with heterogeneous datapaths
Abstract- This paper proposes a hardwadsoftware cosynthesis algorithm for processors with heterogeneous registers. Given a CDFG correspondingto an application program and a timing ...
Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa,...