—This paper focuses on SIMD processor synthesis and proposes a SIMD instruction set/functional unit synthesis algorithm. Given an initial assembly code and a timing constraint, t...
Non-rectangular (rectilinear) shape occurs very often in deep submicron floorplanning. Most previous algorithms are designed to handle only convex rectilinear blocks. However, han...
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
Tom Vander Aa, Murali Jayapala, Francisco Barat, G...
Many important tasks in circuit design and verification can be performed in practice via reductions to Boolean Satisfiability (SAT), making SAT a fundamental EDA problem. However ...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...
: A single-chip 512-point FFT processor is presented. This processor is based on the cached-memory architecture (CMA) with the resource-saving multidatapath radix-23 computation el...
Naoto Miyamoto, Leo Karnan, Kazuyuki Maruo, Koji K...