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ASPDAC
2006
ACM
91views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Statistical corner conditions of interconnect delay (corner LPE specifications)
- Timing closure in LSI design becomes more and more difficult. But the conventional interconnect RC extraction method have over-margins caused by its corner conditions settings. I...
Kenta Yamada, Noriaki Oda
ASPDAC
2006
ACM
109views Hardware» more  ASPDAC 2006»
13 years 11 months ago
Hardware debugging method based on signal transitions and transactions
- This paper proposes a hardware design debugging method, Transition and Transaction Tracer (TTT), which probes and records the signals of interest for a long time, hours, days, or...
Nobuyuki Ohba, Kohji Takano
ASPDAC
2006
ACM
115views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Hardware implementation of super minimum all digital FM demodulator
– We propose improvement of the new architecture of digital FM demodulator. This work enhances signal quality, system clock frequency, and superior than well known PLL technique ...
Nursani Rahmatullah, Arif E. Nugroho
ASPDAC
2006
ACM
118views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Task placement heuristic based on 3D-adjacency and look-ahead in reconfigurable systems
To get efficient HW management in 2D Reconfigurable Systems, heuristics are needed to select the best place to locate each arriving task. We propose a technique that locates the ta...
Jesús Tabero, Julio Septién, Hortens...
ASPDAC
2006
ACM
95views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Interconnect RL extraction at a single representative frequency
— This paper proposes a method to determine a single frequency for interconnect RL extraction. Resistance and inductance of interconnects depend on frequency, and hence the extra...
Akira Tsuchiya, Masanori Hashimoto, Hidetoshi Onod...