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    ASPDAC
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    Functional and partially-functional skewed-load tests
    15 years 1 months ago
    Functional and partially-functional skewed-load tests
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    Irith Pomeranz, Sudhakar M. Reddy
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    113
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    2010
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    Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs
    15 years 1 months ago
    Power and slew-aware clock network design for through-silicon-via (TSV) based 3D ICs
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    Xin Zhao, Sung Kyu Lim
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    An alternative polychronous model and synthesis methodology for model-driven embedded software
    15 years 1 months ago
    An alternative polychronous model and synthesis methodology for model-driven embedded software
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    Bijoy A. Jose, Sandeep K. Shukla
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    92
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    iRetILP: an efficient incremental algorithm for min-period retiming under general delay model
    15 years 1 months ago
    iRetILP: an efficient incremental algorithm for min-period retiming under general delay model
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    Debasish Das, Jia Wang, Hai Zhou
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    ASPDAC
    2010
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    Efficient throughput-guarantees for latency-sensitive networks-on-chip
    15 years 1 months ago
    Efficient throughput-guarantees for latency-sensitive networks-on-chip
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    Jonas Diemer, Rolf Ernst, Michael Kauschke
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