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IEEEINTERACT
2002
IEEE
14 years 12 days ago
Code Cache Management Schemes for Dynamic Optimizers
A dynamic optimizer is a software-based system that performs code modifications at runtime, and several such systems have been proposed over the past several years. These systems ...
Kim M. Hazelwood, Michael D. Smith
IEEEPACT
2002
IEEE
14 years 12 days ago
Optimizing Loop Performance for Clustered VLIW Architectures
Modern embedded systems often require high degrees of instruction-level parallelism (ILP) within strict constraints on power consumption and chip cost. Unfortunately, a high-perfo...
Yi Qian, Steve Carr, Philip H. Sweany
MICRO
2002
IEEE
143views Hardware» more  MICRO 2002»
14 years 12 days ago
Effective instruction scheduling techniques for an interleaved cache clustered VLIW processor
Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functio...
Enric Gibert, F. Jesús Sánchez, Anto...
MICRO
2002
IEEE
104views Hardware» more  MICRO 2002»
14 years 12 days ago
Reducing register ports for higher speed and lower energy
The key issues for register file design in high-performance processors are access time and energy. While previous work has focused on reducing the number of registers, we propose...
Il Park, Michael D. Powell, T. N. Vijaykumar
SSIAI
2002
IEEE
14 years 12 days ago
Active Contours for Cell Tracking
This paper introduces an active contour or snakebased method for tracking cells within a video sequence. Specifically, we apply our cell tracking techniques to rolling leukocytes ...
Nilanjan Ray, Scott T. Acton