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114
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DAC
1997
ACM
15 years 8 months ago
Frequency-Domain Compatibility in Digital Filter BIST
We examine frequency-domain issues in the design and selection of on-chip test generators for built-in self-test (BIST) of highperformance digital filters. Test-generator/circuit...
Laurence Goodby, Alex Orailoglu
121
Voted
DAC
1997
ACM
15 years 8 months ago
A Graph-Based Synthesis Algorithm for AND/XOR Networks
In this paper, we introduce a Shared Multiple Rooted XORbased Decomposition Diagram XORDD to represent functions with multiple outputs. Based on the XORDD representation, we dev...
Yibin Ye, Kaushik Roy
138
Voted
DAC
1997
ACM
15 years 8 months ago
Analysis and Evaluation of Address Arithmetic Capabilities in Custom DSP Architectures
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
Ashok Sudarsanam, Stan Y. Liao, Srinivas Devadas
149
Voted
DAC
1997
ACM
15 years 8 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...
102
Voted
DAC
1997
ACM
15 years 8 months ago
Zeros and Passivity of Arnoldi-Reduced-Order Models for Interconnect Networks
CAD tools and research in the area of reduced-order modeling of largelinearinterconnect networkshaveevolved from merely finding a Pad´e approximation for the given network trans...
Ibrahim M. Elfadel, David D. Ling