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DAC
2008
ACM
14 years 10 months ago
Automated transistor sizing for FPGA architecture exploration
The creation of an FPGA requires extensive transistor-level design. This is necessary for both the final design, and during architecture exploration, when many different logic and...
Ian Kuon, Jonathan Rose
DAC
2008
ACM
14 years 10 months ago
Cache modeling in probabilistic execution time analysis
Multimedia-dominated consumer electronics devices (such as cellular phone, digital camera, etc.) operate under soft real-time constraints. Overly pessimistic worst-case execution ...
Yun Liang, Tulika Mitra
DAC
2008
ACM
14 years 10 months ago
Symbolic noise analysis approach to computational hardware optimization
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
Arash Ahmadi, Mark Zwolinski
DAC
2008
ACM
14 years 10 months ago
Compiler-driven register re-assignment for register file power-density and temperature reduction
Temperature hot-spots have been known to cause severe reliability problems and to significantly increase leakage power. The register file has been previously shown to exhibit the ...
Xiangrong Zhou, Chenjie Yu, Peter Petrov
DAC
2008
ACM
14 years 10 months ago
Feedback-controlled reliability-aware power management for real-time embedded systems
In recent literature it has been reported that Dynamic Power Management (DPM) may lead to decreased reliability in real-time embedded systems. The ever-shrinking device sizes cont...
Ranjani Sridharan, Nikhil Gupta, Rabi N. Mahapatra