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2002
IEEE
98views Hardware» more  DATE 2002»
14 years 2 months ago
A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits
A unified approach to fault simulation for FGDs is introduced. Instead of a direct fault simulation, the proposed approach calculates indirectly from the simulator output the set...
Michael Pronath, Helmut E. Graeb, Kurt Antreich
DATE
2002
IEEE
69views Hardware» more  DATE 2002»
14 years 2 months ago
Verifying Clock Schedules in the Presence of Cross Talk
This paper addresses verifying the timing of circuits containing level-sensitive latches in the presence of cross talk. We show that three consecutive periodic occurrences of the ...
Soha Hassoun, Eduardo Calvillo-Gámez, Chris...
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 2 months ago
A Powerful System Design Methodology Combining OCAPI and Handel-C for Concept Engineering
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
Klaus Buchenrieder, Andreas Pyttel, Alexander Sedl...
DATE
2002
IEEE
73views Hardware» more  DATE 2002»
14 years 2 months ago
A Burst-Mode Oriented Back-End for the Balsa Synthesis System
This paper introduces several new component clustering techniques for the optimization of asynchronous systems. In particular, novel “Burst-Mode aware” restrictions are impose...
Tiberiu Chelcea, Steven M. Nowick, Andrew Bardsley...
DATE
2002
IEEE
97views Hardware» more  DATE 2002»
14 years 2 months ago
Analog IP Testing: Diagnosis and Optimization
In this paper, we present an innovative methodology to estimate and improve the quality of analog and mixed-signal circuit testing. We first detect and reduce the redundancy in th...
Carlo Guardiani, Patrick McNamara, Lidia Daldoss, ...