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2002
IEEE
80views Hardware» more  DATE 2002»
14 years 3 months ago
Test Planning and Design Space Exploration in a Core-Based Environment
This paper proposes a comprehensive model for test planning in a core-based environment. The main contribution of this work is the use of several types of TAMs and the considerati...
Érika F. Cota, Luigi Carro, Marcelo Lubasze...
DATE
2002
IEEE
108views Hardware» more  DATE 2002»
14 years 3 months ago
Networks on Silicon: Combining Best-Effort and Guaranteed Services
We advocate a network on silicon (NOS) as a hardware architecture to implement communication between IP cores in future technologies, and as a software model in the form of a prot...
Kees G. W. Goossens, Paul Wielage, Ad M. G. Peeter...
DATE
2002
IEEE
135views Hardware» more  DATE 2002»
14 years 3 months ago
A Code Transformation-Based Methodology for Improving I-Cache Performance of DSP Applications
This paper focuses on I-cache behaviour enhancement through the application of high-level code transformations. Specifically, a flow for the iterative application of the I-Cache pe...
Nikolaos D. Liveris, Nikolaos D. Zervas, Dimitrios...
DATE
2002
IEEE
124views Hardware» more  DATE 2002»
14 years 3 months ago
Parameter Controlled Automatic Symbolic Analysis of Nonlinear Analog Circuits
In this paper we introduce an approach for parameter controlled symbolic analysis of nonlinear analog circuits. Based on a state-of–the-art algorithm, it enables the removal of ...
Ralf Popp, Joerg Oehmen, Lars Hedrich, Erich Barke
DATE
2002
IEEE
151views Hardware» more  DATE 2002»
14 years 3 months ago
Analog Circuit Sizing Using Adaptive Worst-Case Parameter Sets
In this paper, a method for nominal design of analog integrated circuits is presented that includes process variations and operating ranges by worst-case parameter sets. These set...
Robert Schwencker, Frank Schenkel, Michael Pronath...