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DSD
2007
IEEE
116views Hardware» more  DSD 2007»
14 years 1 months ago
Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation
This paper focuses on numerical function generators (NFGs) based on k-th order polynomial approximations. We show that increasing the polynomial order k reduces significantly the...
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
DSD
2007
IEEE
163views Hardware» more  DSD 2007»
14 years 1 months ago
Architecture of a Small Low-Cost Satellite
This paper presents the architecture of a small university satellite that we have developed. The main design criteria were low cost and fault tolerance, which have been achieved b...
Dante Del Corso, Claudio Passerone, Leonardo Maria...
JNCA
2007
80views more  JNCA 2007»
13 years 7 months ago
High-speed routers design using data stream distributor unit
As the line rates standards are changing frequently to provide higher bit rates, the routers design has become very challenging due to the need for new wire-speed router’s netwo...
Ali El Kateeb
DSD
2007
IEEE
164views Hardware» more  DSD 2007»
14 years 1 months ago
An Efficient Hardware Architecture for Quarter-Pixel Accurate H.264 Motion Estimation
In this paper, we present an efficient hardware architecture for real-time implementation of quarter-pixel accurate variable block size motion estimation for H.264 / MPEG4 Part 10...
Serkan Oktem, Ilker Hamzaoglu
DSD
2007
IEEE
105views Hardware» more  DSD 2007»
14 years 1 months ago
Scaling Analytical Models for Soft Error Rate Estimation Under a Multiple-Fault Environment
With continuing increase in soft error rates, its foreseeable that multiple faults will eventually need to be considered when modeling circuit sensitivity and evaluating faulttole...
Christian J. Hescott, Drew C. Ness, David J. Lilja