334 search results - page 12 / 67 » eXtended Block Cache |
ISCAPDCS
2004
13 years 9 months ago
2004
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past de...
HIPEAC
2009
Springer
14 years 4 days ago
2009
Springer
Abstract. Technological advances and increasingly complex and dynamic application behavior argue for revisiting mechanisms that adapt logical cache block size to application charac...
DSD
2010
IEEE
13 years 6 months ago
2010
IEEE
— Chip Multiprocessor (CMP) systems have become the reference architecture for designing micro-processors, thanks to the improvements in semiconductor nanotechnology that have co...
ASPDAC
2008
ACM
13 years 9 months ago
2008
ACM
On chip memories provide fast and energy efficient storage for code and data in comparison to caches or external memories. We present techniques and algorithms that allow for an au...
ISCA
2009
IEEE
14 years 2 months ago
2009
IEEE
