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AAECC
2007
Springer
111views Algorithms» more  AAECC 2007»
13 years 7 months ago
When cache blocking of sparse matrix vector multiply works and why
Abstract. We present new performance models and a new, more compact data structure for cache blocking when applied to the sparse matrixvector multiply (SpM×V) operation, y ← y +...
Rajesh Nishtala, Richard W. Vuduc, James Demmel, K...
DATE
2008
IEEE
117views Hardware» more  DATE 2008»
14 years 2 months ago
CATCH: A Mechanism for Dynamically Detecting Cache-Content-Duplication and its Application to Instruction Caches
Cache-Content-Duplication (CCD) occurs when there is a miss for a block in a cache and the entire content of the missed block is already in the cache in a block with a different t...
Marios Kleanthous, Yiannakis Sazeides
PCI
2005
Springer
14 years 1 months ago
Tuning Blocked Array Layouts to Exploit Memory Hierarchy in SMT Architectures
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
Evangelia Athanasaki, Kornilios Kourtis, Nikos Ana...
TC
2008
13 years 7 months ago
RACE: A Robust Adaptive Caching Strategy for Buffer Cache
While many block replacement algorithms for buffer caches have been proposed to address the wellknown drawbacks of the LRU algorithm, they are not robust and cannot maintain a cons...
Yifeng Zhu, Hong Jiang
MICRO
2009
IEEE
191views Hardware» more  MICRO 2009»
14 years 2 months ago
Pseudo-LIFO: the foundation of a new family of replacement policies for last-level caches
Cache blocks often exhibit a small number of uses during their life time in the last-level cache. Past research has exploited this property in two different ways. First, replacem...
Mainak Chaudhuri