Based on an explicit formulation of delays, an improved model for low voltage operation of CMOS inverter has been derived. Extrinsic and intrinsic effects, such as transistor curr...
DPLAYOUT is a layout synthesis tool for bit-sliced datapath designs targeting standard-cell libraries. We developed fast and efficient heuristics for placing the cells in a bit-s...
Because it costs to solve ElectroMagnetic Compatibility (EMC) problems late in the development process, new methods have to predict radiated electromagnetic emissions at the desig...
This paper presents a formal approach to test combinational circuits. For the sake of explanation we describe the basic algorithms with the help of the stuck–at fault model. Ple...
Manfred Henftling, Hannes C. Wittmann, Kurt Antrei...
This paper describes a method to optimize the performance of data paths. It is based on bit-level arithmetic transformations, and is especially suited to optimize large adder stru...
Luc Rijnders, Zohair Sahraoui, Paul Six, Hugo De M...