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FCCM
1998
IEEE
116views VLSI» more  FCCM 1998»
14 years 2 months ago
A Reconfigurable Multiplier Array For Video Image Processing Tasks, Suitable For Embedding In An FPGA Structure
Abstract This paper presents a design for a reconfigurable multiplier array. The multiplier is constructed using an array of 4 bit Flexible Array Blocks (FABs), which could be emb...
Simon D. Haynes, Peter Y. K. Cheung
FCCM
1998
IEEE
89views VLSI» more  FCCM 1998»
14 years 2 months ago
A Run-Time Reconfigurable Engine for Image Interpolation
Custom Computing Machines (CCM's) have demonstrated significant performance advantages over general-purpose processors for certain classes of problems. However, problems can ...
Rhett D. Hudson, David I. Lehn, Peter M. Athanas
FCCM
1998
IEEE
99views VLSI» more  FCCM 1998»
14 years 2 months ago
FPGA-Based Architecture Evaluation of Cryptographic Coprocessors for Smartcards
In 1996, about 600 million IC-cards were manufactured worldwide. Due to very small die sizes (max. 25 mm2 ) smartcards encounter more severe restrictions than conventional coproces...
Hagen Ploog, Dirk Timmermann
FCCM
1998
IEEE
170views VLSI» more  FCCM 1998»
14 years 2 months ago
Characterization and Parameterization of a Pipeline Reconfigurable FPGA
ended abstract defines a class of architectures for pipeline reconfigurable FPGAs by parameterizing a generic model. This class of architectures is sufficiently general to allow e...
Matthew Moe, Herman Schmit, Seth Copen Goldstein
FCCM
1998
IEEE
148views VLSI» more  FCCM 1998»
14 years 2 months ago
JHDL - An HDL for Reconfigurable Systems
JHDL is a design tool for reconfigurable systems that allows designers to express circuit organizations that dynamically change over time in a natural way, using only standard pro...
Peter Bellows, Brad L. Hutchings