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DELTA
2008
IEEE
14 years 1 months ago
High Performance FPGA Implementation of the Mersenne Twister
Efficient generation of random and pseudorandom sequences is of great importance to a number of applications [4]. In this paper, an efficient implementation of the Mersenne Twis...
Shrutisagar Chandrasekaran, Abbes Amira
CAMP
2000
IEEE
13 years 11 months ago
An FPGA Architecture for High Speed Edge and Corner Detection
This paper presents an FPGA based architecture for high speed edge and corner detection. Applications targeted are in high speed computer vision (i.e. more than 100 images per sec...
Cesar Torres-Huitzil, Miguel Arias-Estrada
AES
2000
Springer
94views Cryptology» more  AES 2000»
13 years 11 months ago
A Comparison of the AES Candidates Amenability to FPGA Implementation
Nicholas Weaver, John Wawrzynek
DFT
2000
IEEE
123views VLSI» more  DFT 2000»
13 years 10 months ago
Self-Reconfigurable Mesh Array System on FPGA
Masaru Fukushi, Susumu Horiguchi
FPGA
2000
ACM
479views FPGA» more  FPGA 2000»
13 years 10 months ago
Implementing a RAKE receiver for wireless communications on an FPGA-based computer system
RAKE receivers are widely used in the wireless communications industry. Currently, custom VLSI is the most popular implementation. Programmable and reconfigurable logic implementa...
Ali M. Shankiti, Miriam Leeser