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FPL
2005
Springer
73views Hardware» more  FPL 2005»
14 years 3 months ago
Defect Tolerance in Multiple-FPGA Systems
SRAM-based FPGAs have an inherent capacity for defect tolerance. We propose a simple scheme that exploits this potential in multiple-FPGA systems. The symmetry of the system is ex...
Zohair Hyder, John Wawrzynek
CHES
2005
Springer
123views Cryptology» more  CHES 2005»
14 years 3 months ago
Improved Higher-Order Side-Channel Attacks with FPGA Experiments
We demonstrate that masking a block cipher implementation does not sufficiently improve its security against side-channel attacks. Under exactly the same hypotheses as in a Differ...
Eric Peeters, François-Xavier Standaert, Ni...
FPGA
2005
ACM
121views FPGA» more  FPGA 2005»
14 years 3 months ago
Floating-point sparse matrix-vector multiply for FPGAs
Large, high density FPGAs with high local distributed memory bandwidth surpass the peak floating-point performance of high-end, general-purpose processors. Microprocessors do not...
Michael DeLorimier, André DeHon
ISCAS
2005
IEEE
153views Hardware» more  ISCAS 2005»
14 years 3 months ago
A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher
—A high-throughput hardware architecture and FPGA implementation of the 64-bit NESSIE proposal, MISTY1 block cipher, is presented in this paper. This architecture, in contrast to...
Paris Kitsos, Michalis D. Galanis, Odysseas G. Kou...
DAC
2005
ACM
14 years 10 months ago
Leakage efficient chip-level dual-Vdd assignment with time slack allocation for FPGA power reduction
To reduce power, Vdd programmability has been proposed recently to select Vdd-level for interconnects and to powergate unused interconnects. However, Vdd-level converters used in ...
Yan Lin, Lei He