282 search results - page 26 / 57 » fpga 2006 |
ASAP
2006
IEEE
14 years 2 months ago
2006
IEEE
In this paper, we analyze the theoretical delay bound of the SHA-1 algorithm and propose architectures to achieve high throughput hardware implementations which approach this boun...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Packet editing is a fundamental building block of data communication systems such as switches and routers. Circuits that implement this function are critical and define the featur...
FPL
2006
Springer
14 years 8 days ago
2006
Springer
FPGAs have reached densities that can implement floatingpoint applications, but floating-point operations still require a large amount of FPGA resources. One major component of IE...
AHS
2006
IEEE
14 years 2 months ago
2006
IEEE
This paper presents an efficient hardware architecture for real-time implementation of adaptive deblocking filter algorithm used in H.264 video coding standard. This hardware is d...
BIOSYSTEMS
2007
13 years 8 months ago
2007
A simple and fast technique for depth estimation based on phase measurement has been adopted for the implementation of a real-time stereo system with sub-pixel resolution on an FP...