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DAC
2008
ACM

186views Computer Architecture» more DAC 2008»

An 8x8 run-time reconfigurable FPGA embedded in a SoC

14 years 9 months ago

This paper presents a RTR FPGA embedded in a System on Chip fabricated in 130nm CMOS process. Various aspects of the design flow, from automation to floor-planning are discussed. ...

Sumanta Chaudhuri, Sylvain Guilley, Florent Flamen...

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29

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DELTA
2008
IEEE

147views Information Technology» more DELTA 2008»

High Performance FPGA Implementation of the Mersenne Twister

14 years 3 months ago

Download bura.brunel.ac.uk

Efﬁcient generation of random and pseudorandom sequences is of great importance to a number of applications [4]. In this paper, an efﬁcient implementation of the Mersenne Twis...

Shrutisagar Chandrasekaran, Abbes Amira

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26

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VLSISP
2002

199views more VLSISP 2002»

Evaluation of CORDIC Algorithms for FPGA Design

13 years 8 months ago

Download bwrc.eecs.berkeley.edu

Abstract. This paper presents a study of the suitability for FPGA design of full custom based CORDIC implementations. Since all these methods are based on redundant arithmetic, the...

Javier Valls, Martin Kuhlmann, Keshab K. Parhi

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27

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MAM
2008

138views more MAM 2008»

FPGA based tester tool for hybrid real-time systems

13 years 8 months ago

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This paper presents a design methodology for a hybrid Hardwarein-the-Loop (HIL) tester tool, based on both discrete event system theory, given by timed automata, and continuous sy...

Jan Krakora, Zdenek Hanzálek

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11

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COMPUTER
2008

50views more COMPUTER 2008»

Warp Processing: Dynamic Translation of Binaries to FPGA Circuits

13 years 8 months ago

Download www.cs.ucr.edu

Frank Vahid, Greg Stitt, Roman L. Lysecky

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