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DATE
2009
IEEE
73views Hardware» more  DATE 2009»
14 years 2 months ago
Priority-based packet communication on a bus-shaped structure for FPGA-systems
—We present an application tailored packed-based SoC communication system with one-hop communication between all entities, priority-based arbitration, broadcast and multicast sup...
Oliver Sander, Benjamin Glas, Christoph Roth, J&uu...
ARC
2009
Springer
134views Hardware» more  ARC 2009»
14 years 3 days ago
A HyperTransport 3 Physical Layer Interface for FPGAs
Abstract. This paper presents the very first implementation of a HyperTransport 3 physical layer interface for Field Programmable Gate Arrays. HyperTransport is a low latency, high...
Heiner Litz, Holger Fröning, Ulrich Brün...
ANCS
2009
ACM
13 years 5 months ago
Motivating future interconnects: a differential measurement analysis of PCI latency
Local interconnect architectures are at a cusp in which advances in throughput have come at the expense of power and latency. Moreover, physical limits imposed on dissipation and ...
David J. Miller, Philip M. Watts, Andrew W. Moore
FPL
2009
Springer
100views Hardware» more  FPL 2009»
13 years 11 months ago
A virus scanning engine using a parallel finite-input memory machine and MPUs
This paper presents a virus scanning engine. After showing the difference between ClamAV (an anti-virus software) and SNORT (an intrusion detection software), we show a new archit...
Hiroki Nakahara, Tsutomu Sasao, Munehiro Matsuura,...
WISA
2009
Springer
14 years 2 months ago
A Comparative Study of Mutual Information Analysis under a Gaussian Assumption
In CHES 2008 a generic side-channel distinguisher, Mutual Information, has been introduced to be independent of the relation between measurements and leakages as well as between le...
Amir Moradi, Nima Mousavi, Christof Paar, Mahmoud ...