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ICCAD
1994
IEEE
13 years 10 months ago
1994
IEEE
This work presents techniques for computing the switching activities of all circuit nodes under pseudorandom or biased input sequences and assuming a zero delay mode of operation....
ICCAD
1994
IEEE
13 years 10 months ago
1994
IEEE
We present a general framework for the construction of vertex orderings for netlist clustering. Our WINDOW algorithm constructs an ordering by iteratively adding the vertex with h...
ICCAD
1994
IEEE
13 years 10 months ago
1994
IEEE
As device feature size decreases, interconnection delay becomes the dominating factor of system performance. Thus it is important that accurate physical information is used during...
ICCAD
1994
IEEE
13 years 10 months ago
1994
IEEE
Fault dictionary compaction has been accomplished in the past by removing responses on individual output pins for speci c test vectors. In contrast to the previous work, we presen...
ICCAD
1994
IEEE
13 years 10 months ago
1994
IEEE
For a logic design with level-sensitive latches, we need to validate timing signal paths which may flush through several latches. We developed efficient algorithms based on the mo...