A number of low-power designs,such as those for mobile communicationequipment, containswitched-capacitorcircuits. In such designs it is important to be able to estimate the power ...
Chad Young, Giorgio Casinovi, Jonathan Fowler, Pau...
A new method is presented to compute the exact observability don't cares (ODC) for multilevel combinational circuits. A new mathematical concept, called polarization, is intr...
Harm Arts, Michel R. C. M. Berkelaar, C. A. J. van...
In a constraint-drivenlayout synthesisenvironment,parasitic constraints are generated and implemented in each phase of the design process to meet a given set of performance specif...
Edoardo Charbon, Paolo Miliozzi, Enrico Malavasi, ...
In this paper, we propose a method to generate high quality test waveform on chip to avoid the parasitic eects in an analog testability bus test environment. For the test response...
Chauchin Su, Yue-Tsang Chen, Shyh-Jye Jou, Yuan-Tz...
Functional simulation is the most widely used method for design verification. At various levels of abstraction, e.g., behavioral, register-transfer level and gate level, the design...