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ICCAD
1999
IEEE
14 years 1 months ago
1999
IEEE
This paper presents an approach to reduce interconnect cost by insertion of identity operations in a CDFG. Other than previous approaches, it is based on systematic pattern analys...
ICCAD
1999
IEEE
14 years 1 months ago
1999
IEEE
Domino logic is a high-performance circuit configuration that is usually embedded in static logic environment and tightly coupled with the clocking scheme. In this paper, the timi...
ICCAD
1999
IEEE
14 years 1 months ago
1999
IEEE
We extend the partial inductance concept by replacing the magnetic interaction between open filaments i and j by that between filament j and a (finite) closed loop, formed by conn...
ICCAD
1999
IEEE
14 years 1 months ago
1999
IEEE
: Inductance of on-chip interconnects gives rise to signal overshoots and undershoots that can cause logic errors. By considering technology trends, we show that in 0.13
ICCAD
1999
IEEE
14 years 1 months ago
1999
IEEE
A common approach to performance optimization of circuits focuses on re-synthesis to reduce the length of all paths greater than the desired delay . We describe a new delay optimi...