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ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
A latch-based timing analyzer is an essential tool for developing high-speed pipeline designs. As process variations increasingly influence the timing characteristics of DSM desi...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we model each task ...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
We address the classic wire-length estimation problem and propose a new statistical wire-length estimation approach that captures the probability distribution function of net leng...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
edicate Abstraction and Induction Edmund Clarke Daniel Kroening June 25, 2004 CMU-CS-04-131 School of Computer Science Carnegie Mellon University Pittsburgh, PA 15213 It is common...