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ICCD
2001
IEEE
140views Hardware» more  ICCD 2001»
14 years 6 months ago
Cost-effective Hardware Acceleration of Multimedia Applications
General-purpose microprocessors augmented with SIMD execution units enhance multimedia applications by exploiting data level parallelism. However, supporting/overhead related inst...
Deependra Talla, Lizy Kurian John
ICCD
2001
IEEE
213views Hardware» more  ICCD 2001»
14 years 6 months ago
Analysis and Reduction of Capacitive Coupling Noise in High-Speed VLSI Circuits
Abstract-- Scaling the minimum feature size of VLSI circuits to sub-quarter micron and its clock frequency to 2GHz has caused crosstalk noise to become a serious problem, that degr...
Payam Heydari, Massoud Pedram
ICCD
2001
IEEE
120views Hardware» more  ICCD 2001»
14 years 6 months ago
Design of a Predictive Filter Cache for Energy Savings in High Performance Processor Architectures
Filter cache has been proposed as an energy saving architectural feature [9]. A filter cache is placed between the CPU and the instruction cache (I-cache) to provide the instruct...
Weiyu Tang, Rajesh K. Gupta, Alexandru Nicolau
ICCD
2001
IEEE
103views Hardware» more  ICCD 2001»
14 years 6 months ago
Fixed-outline Floorplanning through Better Local Search
Classical floorplanning minimizes a linear combination of area and wirelength. When Simulated Annealing is used, e.g., with the Sequence Pair representation, the typical choice o...
Saurabh N. Adya, Igor L. Markov
ICCD
2001
IEEE
98views Hardware» more  ICCD 2001»
14 years 6 months ago
Design Alternatives for Parallel Saturating Multioperand Adders
Parallel saturating multioperand adders significantly improve the performance of GSM speech coders by giving compilers and assembly language programmers the ability to paralleliz...
Pablo I. Balzola, Michael J. Schulte, Jie Ruan, C....