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MICRO
2006
IEEE
114views Hardware» more  MICRO 2006»
14 years 1 months ago
Authentication Control Point and Its Implications For Secure Processor Design
Secure processor architecture enables tamper-proof protection on software that addresses many difficult security problems such as reverse-engineering prevention, trusted computing...
Weidong Shi, Hsien-Hsin S. Lee
INTEGRATION
2008
127views more  INTEGRATION 2008»
13 years 6 months ago
A Viterbi decoder architecture for a standard-agile and reprogrammable transceiver
This paper presents a Viterbi Decoder (VD) architecture for a programmable data transmission system, implemented using a Field Programmable Gate Array (FPGA) device. This VD has b...
Lucia Bissi, Pisana Placidi, Giuseppe Baruffa, And...
ICRA
2000
IEEE
112views Robotics» more  ICRA 2000»
14 years 10 days ago
Visual Tracking with Subpixel Resolution using an Analog VLSI Computational Sensor
This paper describes the application of a computational vision sensor to active binocular tracking. The sensor outputs are used to control the vergence angles of the two cameras a...
Ziyi Lu, Bertram Emil Shi
IFM
2000
Springer
13 years 11 months ago
A Process Compensation Language
This paper presents a formal language for the design of component-based enterprise system. The language (StAC) allows the usual parallel and sequential behaviours, but most signifi...
Michael J. Butler, Carla Ferreira
ACL
2000
13 years 9 months ago
Multi-Component TAG and Notions of Formal Power
This paper presents a restricted version of Set-Local Multi-Component TAGs Weir, 1988 which retains the strong generative capacity of Tree-Local MultiComponent TAG i.e. produces t...
William Schuler, David Chiang, Mark Dras