We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Eliciting user-task models is a thorny problem in modelbased user interface design, and communicating domainspecific knowledge from an expert to a knowledge engineer is a continui...
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
Performance evaluation is a central issue in the design of complex real-time systems. In this work, we propose an extension of socalled "Max-Plus" algebraic techniques to...
Many emerging applications (e.g., teleconference, real-time information services, pay per view, distributed interactive simulation, and collaborative work) are based upon a group ...