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DAC
2012
ACM
12 years 22 days ago
Chip/package co-analysis of thermo-mechanical stress and reliability in TSV-based 3D ICs
In this work, we propose a fast and accurate chip/package thermomechanical stress and reliability co-analysis tool for TSV-based 3D ICs. We also present a design optimization meth...
Moongon Jung, David Z. Pan, Sung Kyu Lim
DAC
2012
ACM
12 years 22 days ago
Exploiting die-to-die thermal coupling in 3D IC placement
In this paper, we propose two methods used in 3D IC placement that effectively exploit the die-to-die thermal coupling in the stack. First, TSVs are spread on each die to reduce t...
Krit Athikulwongse, Mohit Pathak, Sung Kyu Lim
DAC
2012
ACM
12 years 22 days ago
Improving gate-level simulation accuracy when unknowns exist
Unknown values (Xs) may exist in a design due to uninitialized registers or blocks that are powered down. Due to X-pessimism in gate-level logic simulation, such Xs cannot be hand...
Kai-Hui Chang, Chris Browy
DAC
2012
ACM
12 years 22 days ago
A metric for layout-friendly microarchitecture optimization in high-level synthesis
In this work we address the problem of managing interconnect timing in high-level synthesis by generating a layoutfriendly microarchitecture. A metric called spreading score is pr...
Jason Cong, Bin Liu
DAC
2012
ACM
12 years 22 days ago
Self-aware computing in the Angstrom processor
Addressing the challenges of extreme scale computing requires holistic design of new programming models and systems that support those models. This paper discusses the Angstrom pr...
Henry Hoffmann, Jim Holt, George Kurian, Eric Lau,...