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ISCAS
2002
IEEE
14 years 2 months ago
2002
IEEE
This paper proposes an efficient scalable coding scheme with fine-grain scalability, where the base layer is encoded with H.26L, and the enhancement layer is encoded with PFGS cod...
ISCAS
2002
IEEE
14 years 2 months ago
2002
IEEE
Multiple memory module architecture offers higher performance by providing potentially doubled memory bandwidth. Two key problems in gaining high performance in this kind of archi...
ISCA
2002
IEEE
14 years 2 months ago
2002
IEEE
The impact of pipeline length on the performance of a microprocessor is explored both theoretically and by simulation. An analytical theory is presented that shows two opposing ar...
ISCA
2002
IEEE
14 years 2 months ago
2002
IEEE
The importance of the Translation Lookaside Buffer (TLB) on system performance is well known. There have been numerous prior efforts addressing TLB design issues for cutting down ...
ISCA
2002
IEEE
14 years 2 months ago
2002
IEEE
This paper presents ReVive, a novel general-purpose rollback recovery mechanism for shared-memory multiprocessors. ReVive carefully balances the conflicting requirements of avail...