— Violations in the timing constraints of a clocked register can cause a synchronous system to malfunction. The effects of variations in the power supply voltage (VDD) on the tim...
— Diminishing voltage margins, coupled with power and temperature constraints, call for microarchitecture-level runtime mechanisms for voltage control. This paper describes a loc...
Abstract— This paper introduces a novel four-order system, which can generate one-directional (1-D) n−torus, twodirectional (2-D) n × m −torus, three-directional (3-D) n × ...
— This paper presents an eigenvector algorithm (EVA) derived from a criterion using reference signals, in which the EVA is applied to the blind source separation (BSS) of instant...
— With the transition to deep submicron technologies the density of on-chip interconnect lines has increased, together with the switching rate of the signals propagating along th...