A novel 0. 13,um CMOS integrated linear voltage to pulse delay time converter (VTC) is proposed. The VTC ml architecture uses current starved inverters where the inverter delay ver...
We present a neural recording and spectral analysis RECORDING ANALYSIS integrated microsystem. It is the instrumentational and computa- INTERACE PROCESSOR tional core of an envisio...
J. N. Y. Aziz, Rafal Karakiewicz, Roman Genov, B. ...
—In this paper, we propose a cost-effective and low-power 64-point fast Fourier transform (FFT)/inverse FFT (IFFT) architecture and chip adopting the retrenched 8-point FFT/IFFT ...
There has been an increased interest in design of that it can give better performance, if a modified noise broadband (data rate >IMSPS) delta sigma ADCs with over- transfer func...
A. K. Gupta, E. Sanchez-Sinencio, S. Karthikeyan, ...
Abstract— Networks-on-chip (NoCs) are a scalable interconnect solution to large scale multiprocessor systems on chip and are rapidly becoming reality. As the ratio of embedded co...
Calin Ciordas, Kees Goossens, Andrei Radulescu, Tw...