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ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
14 years 1 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
ISCA
2005
IEEE
141views Hardware» more  ISCA 2005»
14 years 1 months ago
RegionScout: Exploiting Coarse Grain Sharing in Snoop-Based Coherence
It has been shown that many requests miss in all remote nodes in shared memory multiprocessors. We are motivated by the observation that this behavior extends to much coarser grai...
Andreas Moshovos
ISCAS
2005
IEEE
209views Hardware» more  ISCAS 2005»
14 years 1 months ago
Low complexity H.263 to H.264 video transcoding using motion vector decomposition
The H.264 adopts various block types and multiple reference frames for motion compensation. For transcoding a video sequence from the H.263 format to the H.264 format, it is benef...
Kai-Tat Fung, Wan-Chi Siu
ISCA
2005
IEEE
128views Hardware» more  ISCA 2005»
14 years 1 months ago
An Evaluation Framework and Instruction Set Architecture for Ion-Trap Based Quantum Micro-Architectures
: The theoretical study of quantum computation has yielded efficient algorithms for some traditionally hard problems. Correspondingly, experimental work on the underlying physical...
Steven Balensiefer, Lucas Kreger-Stickles, Mark Os...
ISCA
2005
IEEE
115views Hardware» more  ISCA 2005»
14 years 1 months ago
RENO - A Rename-Based Instruction Optimizer
RENO is a modified MIPS R10000 register renamer that uses map-table “short-circuiting” to implement dynamic versions of several well-known static optimizations: move eliminat...
Vlad Petric, Tingting Sha, Amir Roth