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ISLPED
1997
ACM
110views Hardware» more  ISLPED 1997»
13 years 11 months ago
A one division per clock pipelined division architecture based on LAPR (lookahead of partial-remainder) for low-power ECC applic
We propose a pipelined division architecture for low-power ECC applications, which is based on partialdivision on group basis and lookahead technique exploiting the linearity in f...
Hyung-Joon Kwon, Kwyro Lee
ISLPED
1997
ACM
124views Hardware» more  ISLPED 1997»
13 years 11 months ago
Low power high level synthesis by increasing data correlation
With the increasing performance and density of VLSI circuits as well as the popularity of portable devices such as personal digital assistance, power consumption has emerged as an...
Dongwan Shin, Kiyoung Choi
ISLPED
1997
ACM
130views Hardware» more  ISLPED 1997»
13 years 11 months ago
Analytical energy dissipation models for low-power caches
We present detailed analytical models for estimating the energy dissipation in conventional caches as well as low energy cache architectures. The analytical models use the run tim...
Milind B. Kamble, Kanad Ghose
ISLPED
1997
ACM
85views Hardware» more  ISLPED 1997»
13 years 11 months ago
Low power motion estimation design using adaptive pixel truncation
Power consumption is very critical for portable video applications such as portable video-phone. Motion estimation in the video encoder requires huge amount of computation and hen...
Zhong-Li He, Kai-Keung Chan, Chi-Ying Tsui, Ming L...
ISLPED
1997
ACM
96views Hardware» more  ISLPED 1997»
13 years 11 months ago
Re-mapping for low power under tight timing constraints
In this paper1 we propose a novel approach to synthesis for low power under tight timing constraints. Starting from a mapped netlist, we apply a powerful generalized matching algo...
Patrick Vuillod, Luca Benini, Giovanni De Micheli