State-of-the-art verification tools are based on efficient operations on Boolean formulas. Traditional manipulation techniques are based on Binary Decision Diagrams (BDDs) and SAT...
This paper presents a hybrid BIST architecture and methods for optimizing it to test systems-on-chip in a cost effective way. The proposed self-test architecture can be implemente...
Gert Jervan, Zebo Peng, Raimund Ubar, Helena Kruus
All synchronous CMOS integrated systems have to pay some sequencing overhead. This overhead includes the skew and the jitter of the clock. It also includes the setup time and the ...
Martin Saint-Laurent, Vojin G. Oklobdzija, Simon S...
Critical systems like pace-makers, defibrillators, wearable computers and other electronic gadgets have to be designed not only for reliability but also for ultra-low power consu...
The paper addresses the issue of microprocessor and microcontroller testing, and follows an approach based on the generation of a test program. The proposed method relies on two p...