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ITC
2003
IEEE
123views Hardware» more  ITC 2003»
14 years 3 months ago
Hysteresis of Intrinsic IDDQ Currents
: Empirical analyses of the IDDQ signatures of 0.18 µm devices indicate that IDDQ currents exhibit hysteresis. A newly proposed test method, SPIRIT (Single Pattern Iteration IDDQ ...
Yukio Okuda, Nobuyuki Furukawa
ITC
2003
IEEE
93views Hardware» more  ITC 2003»
14 years 3 months ago
On Reducing Wrapper Boundary Register Cells in Modular SOC Testing
Motivated by the increasing area and performance overhead caused by wrapping the embedded cores for modular SOC testing, this paper proposes a solution for reducing the number of ...
Qiang Xu, Nicola Nicolici
ITC
2003
IEEE
123views Hardware» more  ITC 2003»
14 years 3 months ago
Exploiting Programmable BIST For The Diagnosis of Embedded Memory Cores
1 This paper addresses the issue of testing and diagnosing a memory core embedded in a complex SOC. The proposed solution is based on a P1500-compliant wrapper that follows a progr...
Davide Appello, Paolo Bernardi, Alessandra Fudoli,...
ITC
2003
IEEE
170views Hardware» more  ITC 2003»
14 years 3 months ago
Double-Tree Scan: A Novel Low-Power Scan-Path Architecture
In a scan-based system with a large number of flip-flops, a major component of power is consumed during scanshift and clocking operation in test mode. In this paper, a novel scan-...
Bhargab B. Bhattacharya, Sharad C. Seth, Sheng Zha...
ITC
2003
IEEE
93views Hardware» more  ITC 2003»
14 years 3 months ago
Hybrid Multisite Testing at Manufacturing
This paper deals with Hybrid multisite testing of VLSI chips by utilizing automatic test equipment (ATE) in connection with built-in self-test (BIST). The performance of a multisi...
Hamidreza Hashempour, Fred J. Meyer, Fabrizio Lomb...