This paper describes a single chip Multiple Instruction Stream Computer (MISC) capable of extracting instruction level parallelism from a broad spectrum of programs. The MISC arch...
Gary S. Tyson, Matthew K. Farrens, Andrew R. Plesz...
An important design decision in the implementation of a superscalar processor is the amount of hardware to allocate to the instruction scheduling mechanism. Dynamic scheduling pro...
- We present a compilation technique for scheduling parallelism on fine grained asynchronous MIMD systems. The shape scheduling algorithm is introduced that utilizes the flexibilit...
Software pipelining is an important instruction scheduling technique for efficiently overlapping successive iterations of loops and executing them in parallel. Modulo scheduling i...
B. Ramakrishna Rau, Michael S. Schlansker, Parthas...
This paper presents a technique for the segmentation of range images. It tends to be a hybrid approach that combines edge detection and region growing techniques toward accomplish...
Alan Wui Tze Lim, Eam Khwang Teoh, Dinesh P. Mital