64 search results - page 12 / 13 » nocs 2009 |
DAC
2009
ACM
13 years 11 months ago
2009
ACM
Process scaling has given designers billions of transistors to work with. As feature sizes near the atomic scale, extensive variation and wearout inevitably make margining unecono...
DSD
2009
IEEE
13 years 10 months ago
2009
IEEE
Modern systems are able to put two or more processors on the same die (Chip Multiprocessors, CMP), each with its private caches, while the last level caches can be either private ...
ANCS
2009
ACM
13 years 4 months ago
2009
ACM
As communication-centric computing paradigm gathers momentum due to increased wire delays and excess power dissipation with technology scaling, researchers have focused their atte...
DFT
2009
IEEE
14 years 1 months ago
2009
IEEE
We propose a framework that allows dual-layer cooperative error control in a nanoscale network-on-chip (NoC), to simultaneously improve reliability, performance and energy efficie...
DSD
2009
IEEE
14 years 1 months ago
2009
IEEE
— In this paper, we present a novel framework for the automated generation of Network-on-Chips (NoC) architectures, that enables architecture exploration and optimization. The au...