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Topologically constrained logic synthesis
14 years 5 months ago
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www.eecs.berkeley.edu
Subarnarekha Sinha, Alan Mishchenko, Robert K. Bra...
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Implicit treatment of substrate and power-ground losses in return-limited inductance extraction
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Dipak Sitaram, Yu Zheng, Kenneth L. Shepard
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Timing-driven placement using design hierarchy guided constraint generation
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er.cs.ucla.edu
Xiaojian Yang, Bo-Kyung Choi, Majid Sarrafzadeh
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How can we exploit typical architectural structures to improve model recovery?
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homepages.inf.ed.ac.uk
Petko Faber, Bob Fisher
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Human Action Recognition By Sequence of Movelet Codewords
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luthuli.cs.uiuc.edu
Xiaolin Feng, Pietro Perona
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