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TCAD
2002
86views more  TCAD 2002»
13 years 9 months ago
Platune: a tuning framework for system-on-a-chip platforms
System-on-a-chip (SOC) platform manufacturers are increasingly adding configurable features that provide power and performance flexibility in order to increase a platform's ap...
Tony Givargis, Frank Vahid
TCAD
2002
85views more  TCAD 2002»
13 years 9 months ago
Architectural energy optimization by bus splitting
This paper proposes split shared-bus architecture to reduce the energy dissipation for global data exchange among a set of interconnected modules. The bus splitting problem for mi...
Cheng-Ta Hsieh, Massoud Pedram
TCAD
2002
98views more  TCAD 2002»
13 years 9 months ago
Reporting of standard cell placement results
VLSI fabrication technology has advanced rapidly, bringing with it a strong demand for faster and better design automation tools. Accurate reporting of results for placement appro...
Patrick H. Madden
TCAD
2002
110views more  TCAD 2002»
13 years 9 months ago
A constructive genetic algorithm for gate matrix layout problems
This paper describes an application of a Constructive Genetic Algorithm (CGA) to the Gate Matrix Layout Problem (GMLP). The GMLP happens in very large scale integration (VLSI) desi...
Alexandre César Muniz de Oliveira, Luiz Ant...
TCAD
2002
93views more  TCAD 2002»
13 years 9 months ago
Hierarchical buffered routing tree generation
Abstract--This paper presents a solution to the problem of performance-driven buffered routing tree generation for VLSI circuits. Using a novel bottom-up construction algorithm and...
Amir H. Salek, Jinan Lou, Massoud Pedram