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PPOPP
2005
ACM
14 years 3 months ago
Exposing disk layout to compiler for reducing energy consumption of parallel disk based systems
Disk subsystem is known to be a major contributor to overall power consumption of high-end parallel systems. Past research proposed several architectural level techniques to reduc...
Seung Woo Son, Guangyu Chen, Mahmut T. Kandemir, A...
LCPC
2005
Springer
14 years 3 months ago
Loop Selection for Thread-Level Speculation
Thread-level speculation (TLS) allows potentially dependent threads to speculatively execute in parallel, thus making it easier for the compiler to extract parallel threads. Howeve...
Shengyue Wang, Xiaoru Dai, Kiran Yellajyosula, Ant...
ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
14 years 3 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
ACISP
2004
Springer
14 years 3 months ago
On Security of XTR Public Key Cryptosystems Against Side Channel Attacks
The XTR public key system was introduced at Crypto 2000. Application of XTR in cryptographic protocols leads to substantial savings both in communication and computational overhead...
Dong-Guk Han, Jongin Lim, Kouichi Sakurai
ASIACRYPT
2004
Springer
14 years 3 months ago
Improved Setup Assumptions for 3-Round Resettable Zero Knowledge
In the bare public-key model, introduced by Canetti et al. [STOC 2000], it is only assumed that each verifier deposits during a setup phase a public key in a file accessible by a...
Giovanni Di Crescenzo, Giuseppe Persiano, Ivan Vis...