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ISQED
2005
IEEE
81views Hardware» more  ISQED 2005»
15 years 9 months ago
Exact Algorithms for Coupling Capacitance Minimization by Adding One Metal Layer
Due to the rapid development of manufacturing process technology and tight marketing schedule, the chip design and manufacturing always work toward an integrated solution to achie...
Hua Xiang, Kai-Yuan Chao, Martin D. F. Wong
IWPSE
2005
IEEE
15 years 9 months ago
EvoLens: Lens-View Visualizations of Evolution Data
Visualizing software evolution is essential for identifying design erosions that have occurred over the past releases. Making evolutionary aspects explicit via visual representati...
Jacek Ratzinger, Michael Fischer, Harald Gall
KBSE
2005
IEEE
15 years 9 months ago
Testing in resource constrained execution environments
Software for resource constrained embedded devices is often implemented in the Java programming language because the Java compiler and virtual machine provide enhanced safety, por...
Gregory M. Kapfhammer, Mary Lou Soffa, Daniel Moss...
160
Voted
MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
15 years 9 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
170
Voted
RTSS
2005
IEEE
15 years 9 months ago
Event Count Automata: A State-Based Model for Stream Processing Systems
Recently there has been a growing interest in models and methods targeted towards the (co)design of stream processing applications; e.g. those for audio/video processing. Streams ...
Samarjit Chakraborty, Linh T. X. Phan, P. S. Thiag...