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2008
IEEE
163views Hardware» more  DATE 2008»
14 years 2 months ago
Design flow for embedded FPGAs based on a flexible architecture template
Modern digital signal processing applications have an increasing demand for computational power while needing to preserve low power dissipation and high flexibility. For many appl...
B. Neumann, Thorsten von Sydow, Holger Blume, Tobi...
ETFA
2008
IEEE
14 years 2 months ago
Pinpointing interrupts in embedded real-time systems using context checksums
When trying to track down bugs using cyclic debugging, the ability to correctly reproduce executions is imperative. In sequential, deterministic, non-real-time software, this repr...
Daniel Sundmark, Henrik Thane
FOCS
2008
IEEE
14 years 2 months ago
Degree Bounded Network Design with Metric Costs
Given a complete undirected graph, a cost function on edges and a degree bound B, the degree bounded network design problem is to find a minimum cost simple subgraph with maximum...
Yuk Hei Chan, Wai Shing Fung, Lap Chi Lau, Chun Ko...
GMP
2008
IEEE
161views Solid Modeling» more  GMP 2008»
14 years 2 months ago
Slit Map: Conformal Parameterization for Multiply Connected Surfaces
Surface parameterization is a fundamental tool in geometric modeling and processing. Most existing methods deal with simply connected disks. This work introduces a novel method to ...
Xiaotian Yin, Junfei Dai, Shing-Tung Yau, Xianfeng...
HOST
2008
IEEE
14 years 2 months ago
Place-and-Route Impact on the Security of DPL Designs in FPGAs
—Straightforward implementations of cryptographic algorithms are known to be vulnerable to attacks aimed not at the mathematical structure of the cipher but rather at the weak po...
Sylvain Guilley, Sumanta Chaudhuri, Jean-Luc Dange...