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ICCAD
2005
IEEE
110views Hardware» more  ICCAD 2005»
14 years 4 months ago
Performance analysis of carbon nanotube interconnects for VLSI applications
The work in this paper analyses the applicability of carbon nanotube (CNT) bundles as interconnects for VLSI circuits, while taking into account the practical limitations in this ...
Navin Srivastava, Kaustav Banerjee
ISCAS
2005
IEEE
113views Hardware» more  ISCAS 2005»
14 years 1 months ago
On the robustness of an analog VLSI implementation of a time encoding machine
Abstract— Time encoding is a mechanism for representing the information contained in a continuous time, bandlimited, analog signal as the zero-crossings of a binary signal. Time ...
Peter R. Kinget, Aurel A. Lazar, Laszlo T. Toth
ISCAS
2005
IEEE
117views Hardware» more  ISCAS 2005»
14 years 1 months ago
A VLSI model of the bat dorsal nucleus of the lateral lemniscus for azimuthal echolocation
— The dorsal nucleus of the lateral lemniscus (DNLL) is a distinct group of auditory cells that play a strategic role in azimuthal echolocation in the bat. Dominated by EI-type c...
Rock Z. Shi, Timothy K. Horiuchi
ISCAS
2005
IEEE
190views Hardware» more  ISCAS 2005»
14 years 1 months ago
Digital VLSI OFDM transceiver architecture for wireless SoC design
—This paper presents the VLSI architecture of an OFDM baseband transceiver for wireless communications. The open-/closed-loop carrier recovery achieves the stepping frequency acq...
Wei-Hsiang Tseng, Ching-Chi Chang, Chorng-Kuang Wa...
GECCO
2005
Springer
148views Optimization» more  GECCO 2005»
14 years 1 months ago
Multiobjective VLSI cell placement using distributed genetic algorithm
Genetic Algorithms have worked fairly well for the VLSI cell placement problem, albeit with significant run times. Two parallel models for GA are presented for VLSI cell placemen...
Sadiq M. Sait, Mohammed Faheemuddin, Mahmood R. Mi...