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DT
2007
57views more  DT 2007»
13 years 7 months ago
Leakage Minimization Technique for Nanoscale CMOS VLSI
This paper proposes a new heuristic approach to determine the input pattern that minimizes leakage currents of nanometer CMOS circuits during sleep mode considering stack and fano...
Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Pa...
TVLSI
2010
13 years 2 months ago
A Low-Cost VLSI Implementation for Efficient Removal of Impulse Noise
Abstract--Image and video signals might be corrupted by impulse noise in the process of signal acquisition and transmission. In this paper, an efficient VLSI implementation for rem...
Pei-Yin Chen, Chih-Yuan Lien, Hsu-Ming Chuang
EAAI
2006
189views more  EAAI 2006»
13 years 7 months ago
Evolutionary algorithms for VLSI multi-objective netlist partitioning
The problem of partitioning appears in several areas ranging from VLSI, parallel programming, to molecular biology. The interest in finding an optimal partition especially in VLSI ...
Sadiq M. Sait, Aiman H. El-Maleh, Raslan H. Al-Aba...
CORR
2010
Springer
159views Education» more  CORR 2010»
13 years 7 months ago
A Novel VLSI Architecture of Fixed-complexity Sphere Decoder
Fixed-complexity sphere decoder (FSD) is a recently proposed technique for multiple-input multiple-output (MIMO) detection. It has several outstanding features such as constant thr...
Bin Wu, Guido Masera
IAJIT
2010
107views more  IAJIT 2010»
13 years 6 months ago
Low Latency, High Throughput, and Less Complex VLSI Architecture for 2D-DFT
: This paper proposes a pipelined, systolic architecture for two- dimensional discrete Fourier transform computation which is highly concurrent. The architecture consists of two, o...
Sohil Shah, Preethi Venkatesan, Deepa Sundar, Muni...